peregrine semiconductor corp. ? | http://www.peregrine-semi.com copyright ? peregrine semiconductor corp. 2003 page 1 of 8 product description figure 1. functional schematic diagram rf lo if figure 2. package type 6-lead mlpm 3 x 3 mm 4 5 6 3 2 1 table 1. ac and dc electrical specifications @ +25 c symbol characteristics min typ max units test conditions f typ operating frequency range 1 dc 6.0 ghz v ds drain-source voltage 260 320 380 mv v gs = +3v, i ds = 40 ma v ds match drain-source voltage match 12 40 mv v t threshold voltage -100 mv v ds = 0.1v; per astm f617-00 r ds drain-source ?on? resistance 6.5 7.75 9.5 ? v gs = +3v, i ds = 40 ma note 1: typical untested operating frequency range of quad mosfet transistors. product specification PE4140 ultra-high linearity broadband quad mosfet array features ? ultimate quad mosfet array ? ultra-high linearity, broadband performance beyond 6.0 ghz ? ideal for mixer applications ? up/down conversion ? low conversion loss ? high lo isolation ? packaged in small 3x3mm mlpm the PE4140 is an ultra-high linearity, passive broadband quad mosfet array with high dynamic range performance capable of operation beyond 6.0 ghz. this quad array operates with differential signals at all ports (rf, lo, if), allowing mixers to be built that use lo powers from -7 dbm to +20 dbm. typical applications range from frequency up/down-conversion to phase detection for cellular/pcs base stations, wireless broadband communications and stb/cable modems. the PE4140 is manufactured in peregrine?s patented ultra thin silicon (utsi ? ) cmos process, offering the performance of gaas with the economy and integration of conventional cmos.
PE4140 product specification copyright ? peregrine semiconductor corp. 2003 file no. 70/0089~03b | utsi ? cmos rfic solutions page 2 of 8 figure 3. pin configuration exposed solder pad (bottom side) if1 rf1 rf2 if2 lo1 lo2 4 5 6 3 2 1 table 2. pin descriptions pin no. pin name description 1 if1 if output connection (drain) 2 rf1 rf input connection (source) 3 rf2 rf input connection (source) 4 lo2 lo input connection (gate) 5 lo1 lo input connection (gate) 6 if2 if output connection (drain) table 3. absolute maximum ratings symbol parameter/conditions min max units t st storage temperature range -65 150 c t op operating temperature range -40 85 c v dc + ac maximum dc plus peak ac voltage across drain- source 3.3 v v dc+ac maximum dc plus peak ac voltage across gate- drain or gate-source 4.2 v v esd esd sensitive device 250 v electrostatic discharge (esd) precautions this mosfet device has minimally protected inputs and is highly susceptible to esd damage. when handling this utsi device, observe the same precautions that you would use with other esd- sensitive devices. latch-up avoidance unlike conventional cmos devices, utsi cmos devices are immune to latch-up. device description the PE4140 passive broadband quad mosfet array is designed for use in up-conversion and down-conversion applications for high performance systems such as cellular infrastructure equipment and stb/catv systems. the PE4140 is an ideal mixer core for a wide range of mixer products, including module level solutions that incorporate baluns or other single-ended matching structures enabling three-port operation. the performance level of this passive mixer is made possible by the very high linearity afforded by peregrine?s utsi cmos process. marking packaged devices are marked with part number ?4140?, date code and lot code.
PE4140 product specification peregrine semiconductor corp. ? | http://www.peregrine-semi.com copyright ? peregrine semiconductor corp. 2003 page 3 of 8 figure 4. typical schematic for a pcs application PE4140 1 6 5 43 2 1 1 1 2 2 2 3 3 3 4 4 4 5 5 5 r16 3 pf r2 1.2 nh r12 1.2 nh r3 2.7 nh r8 2.7 nh t2 m/a com etc1.6-4-2-3 t1 m/a com etc1.6-4-2-3 t3 toko 617db-1024 j3 lo input j4 rf input j6 if out table 4. typical performance in a pcs application @ +25 c parameter minimum ty pical maximum units frequency range** lo rf if 1630 1700 -- -- 70 2130 2200 mhz mhz mhz conversion loss** (includes balun losses) 8.5 db isolation** lo-rf lo-if 36 26 db db input ip3** 32 dbm input 1 db compression** 22 dbm ** data taken on an evaluation board narrow-band tuned to co ver the pcs band, if = 73mhz low-side, lo drive = 17dbm.
PE4140 product specification copyright ? peregrine semiconductor corp. 2003 file no. 70/0089~03b | utsi ? cmos rfic solutions page 4 of 8 typical performance plots in a pcs application @ +25 c (lo=17dbm, if=73mhz low-side) figure 5. iip3 vs. frequency figure 6. conversion loss vs. frequency figure 7. lo-rf & lo-if isolation 5 6 7 8 9 10 1700 1750 1800 1850 1900 1950 2000 2050 2100 conversion loss (db) @ 17dbm lo if=73mhz low-side frequency (mhz) conversion loss -40 -35 -30 -25 -20 -15 -10 -5 0 1700 1750 1800 1850 1900 1950 2000 2050 2100 isolation (db) frequency (mhz) lo-if lo-rf 0 5 10 15 20 25 30 35 40 1700 1750 1800 1850 1900 1950 2000 2050 2100 iip3 (dbm) @ 17dbm lo frequency (mhz)
PE4140 product specification peregrine semiconductor corp. ? | http://www.peregrine-semi.com copyright ? peregrine semiconductor corp. 2003 page 5 of 8 figure 8. typical schematic for a catv application note: l1 and l2 provide lo port matching for optimum perfo rmance. typical gate capacitance is approximately 2.5 pf. table 5. typical performance in a catv application @ +25 c parameter minimum ty pical maximum units frequency range** lo rf if 1116 54 -- -- 1062 1926 864 mhz mhz mhz conversion loss** (includes balun losses) 6.5 db isolation** lo-rf lo-if 40 28 db db input ip3** 23 dbm input 1 db compression** 13 dbm ** data taken on an evaluation board tuned for a broadband catv application, if = 1062mhz, rf drive = -5dbm, lo drive = 10dbm. (reference designators refer to locations on evaluation board: 101/0090~00a) u1 mlp6-3x3 2 1 3 4 5 6 l2 4.7nh j3 lo input 1 t1 etc1.6-4-2-3 1 4 5 3 2 l1 4.7nh t2 etc1.6-4-2-3 1 4 5 3 2 r16 3.0pf (cut short between pads) j4 rf input 1 t3 etc1-1-13 1 4 5 3 2 j6 if out 1
PE4140 product specification copyright ? peregrine semiconductor corp. 2003 file no. 70/0089~03b | utsi ? cmos rfic solutions page 6 of 8 0 2 4 6 8 10 0 200 400 600 800 1000 conversion loss (db) @10dbm lo frequency (mhz) 0 5 10 15 20 25 30 0 200 400 600 800 1000 iip3 (dbm) @10dbm lo frequency (mhz) -60 -50 -40 -30 -20 -10 0 1000 1200 1400 1600 1800 2000 isolation (db) frequency (mhz) lo-rf lo-if typical performance plots in a catv application @ +25 c figure 9. iip3 vs. frequency figure 10. conversion loss vs. frequency figure 11. lo-rf & lo-if isolation
PE4140 product specification peregrine semiconductor corp. ? | http://www.peregrine-semi.com copyright ? peregrine semiconductor corp. 2003 page 7 of 8 edge of plastic body this feature applies to both ends of the pkg. detail a exposed slug/ heat sink exposed metalized feature 0.17 min. 0.24 +0.20 -0.08 0.125 0.17 0.30 0.025 0.025 detail b (2x) exposed 6 5 3 bottom view 2 1 4 3 0.10 c a b 0.05 c 0.95 l c 0.35 +0.08 -0.02 0.29 +0.16 -0.09 1.21 0.10 0.605 0.05 1.050.05 2.010.10 exposed pad see detail a r0.127 typ 0.20 min. r 0.15 typ seating plane side view top view - c - 0.100 c 0.080 c 0.70 0.05 0.20 0.05 0.90 0.10 0.0250.025 10 +2 -10 detail c see detail b 3 1 pin 1 mark c l c l 3.00 0.125 3.00 0.125 0.10 c 0.10 c 23 6 54 4 4 - a - - b - 3 coplanarity applies to exposed heat slug as well as the terminals. 4 profile tolerance applies to plastic body only. 1. dimensions and tolerances are per ansi y14.5 2. dimensions are in millimeters, angles are in degrees. figure 12. package drawing 6-lead mlpm table 6. ordering information order code part marking description package shipping method PE4140-01 4140 PE4140-06mlp3x3-12800f 6-lead 3x3 mlpm 12800 units / canister PE4140-02 4140 PE4140-06mlp3x3-3000c 6- lead 3x3 mlpm 3000 units / t&r PE4140-00 PE4140-ek PE4140-06mlp3x3-ek evaluation kit 1 / box
PE4140 product specification copyright ? peregrine semiconductor corp. 2003 file no. 70/0089~03b | utsi ? cmos rfic solutions page 8 of 8 sales offices united states peregrine semiconductor corp. 6175 nancy ridge drive san diego, ca 92121 tel 1-858-455-0660 fax 1-858-455-0770 japan peregrine semiconductor k.k. 5a-5, 5f imperial tower 1-1-1 uchisaiwaicho, chiyoda-ku tokyo 100-0011 japan tel: 03-3507-5755 fax: 03-3507-5601 europe peregrine semiconductor europe batiment maine 13-15 rue des quatre vents f- 92380 garches tel 33-1-47-41-91-73 fax 33-1-47-41-91-73 for a list of representatives in your area, please refer to our web site at: http://www.peregrine-semi.com data sheet identification advance information the product is in a formative or design stage. the data sheet contains design target s pecifications for product development. specifications and features may change in any manner without notice. preliminary specification the data sheet contains preliminary data. additional data may be added at a later date. peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. product specification the data sheet contains final dat a. in the event peregrine decides to change the specifications, peregrine will notify customers of the intended changes by issuing a pcn (product change notice). the information in this data sheet is believed to be reliable. however, peregrine assumes no liability for the use of this information. use shall be entirely at the user?s own risk. no patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. peregrine?s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the peregrine product could create a situation in which personal injury or death might occur. peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. peregrine products are protected under one or more of the following u.s. patents: 6,090,648; 6,057,555; 5,973,382; 5,973,363; 5,930,638; 5,920,233; 5,895,957; 5,883,396; 5,864,162; 5,863,823; 5,861,336; 5,663,570; 5,610,790; 5,600,169; 5,596,205; 5,572,040; 5,492,857; 5,416,043. other patents are pending. peregrine, the peregrine logotype, peregrine semiconductor corp., and utsi are registered trademarks of peregrine semiconductor corporation. copyright ? 2003 peregrine semiconduc tor corp. all rights reserved.
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